POKEY in VHDL

MikeJ's "Asteroids DeLuxe" project is pretty impressive, emulating a monochrome vector graphic display to a VGA monitor. It also includes POKEY emulator code. I grafted this in rather than re-invent it.

Sound Interface

The original chip generated a one-bit sound signal that passed through a simple four-bit volume control. Outside the chip, it then passed through an analogue filter circuit.

MikeJ uses a digital filter to produce eight-bit digital audio output, though he notes that four bits is hardly any different.

It was easy for me to route the parallel audio into my 8-bit serial DAC.

The sound interface now appears to be working: I can poke various bytes to it and get plausible sounds out.

Keyboard Interface

MikeJ has omitted the keyboard logic, for the very good reason that there was no keyboard on the Asteroids machine. It should not be a problem to modify my own PS/2 keyboard interface to send character data to the POKEY logic. One has to translate the PS/2 scan codes into Atari scan codes.

A draft translator has been written, and is producing Atari scan codes and status that appear in the right places. A few remaining details need to addressed.

Potentiometer Interface

These use counters that are similar to the video line counters. I'd have liked to use the same counters for both, thus saving some logic resources. It seems practical to use the video line counters for measuring the pot timings, but the Atari system could not connect those signals from the ANTIC to POKEY because of limited pins. Therefore Atari replicated the counters. Thus they can be reset at any time by writing to the potgo register. For full compatibility I will have to do the same.

The pots are non-essential right now. They rely on reading a slowly rising voltage on the caps being charged up, and I suspect the FPGA will not like that. I'd go for external schmitt trigger buffers. A '245 chip is schmitt input but I would check the lowest input slew rate. The data sheets I have seen so far do not specify any lower limit.

The caps need discharging too, and I would rather avoid having the FPGA discharging relatively large capacitive loads. Thus I reckon I will use another '245 chip to do this. One side to caps, the other side to ground, and the output enable driven by potgo. Possibly stretched to give a decent discharge time.

Timer Interface

The POKEY chip can use the audio frequency generators as timers, generating interrupts at regular intervals. The VHDL model does not implement this ability yet.